A Barristor Company | Graphene Barristor

As CMOS technology began to reach its physical limitations, the exploration of 2D materials like Graphene and TMDCs emerged as potential alternatives to overcome these constraints. The graphene barristor was developed to address the non-switching issue of graphene-based devices by controlling the Schottky barrier with various semiconductor junctions. This innovation, along with the stable surface states and energy efficiency of 2D semiconductors, has expanded the potential for more adaptable and power-efficient IC integration.

In the late 1960s, there arose a need for new integrated circuit technology, leading to the invention of CMOS (Complementary Metal Oxide Semiconductor). Subsequently, the high integration density and low power consumption of CMOS inverters greatly influenced the advancement of high-density integrated circuit technology. However, with the recent breaking of Moore's Law, scaling down of CMOS-based ICs has encountered limitations. In this scenario, 2D materials such as Graphene and TMDC (Transition Metal Dichalcogenides) began to be considered as new alternatives.

However, the characteristic of having no bandgap in graphene led to the problem of the device not turning off. Due to the absence of a bandgap in the channel, only control of the number of charge carriers accumulated in the channel is possible. Additionally, while graphene theoretically achieves an on/off ratio of around 100, in practice, impurities in the substrate during device fabrication reduce this ratio to around 10, making it insufficient for practical switching applications.

Since the invention of the graphene barristor, subsequent research on switching devices through GB is being conducted by varying the type of semiconductor junction to the graphene, using organic semiconductor, C60 fullerene, CNT, and 2-dimensional (2D) semiconductor (e.g. WS2, MoS2, MoTe2 etc). In case of the 2D semiconductors, recognized for their significantly more stable surface state compared to silicon, they have found a wide range of applications in the fabrication of barristors. They can overcome the dimensional limitations inherent to SiFET CMOS.

Using Organic Semiconductor-Graphene Junction Barristor using C60 fullerene and CNT Two dimensional TMDC van der waals materials (e.g. WS2, MoS2, MoTe2 etc) In case of 2D semiconductors, recognized for their significantly more stable surface state compared to silicon, have found a wide range of applications in the fabrication of barristors. They can overcome the dimensional limitations inherent to SiFET CMOS. This dimensional flexibility not only makes these barristors highly adaptable but also broadens their potential for applications in Integrated Circuit (IC) integration. Moreover, another significant advantage of 2D semiconductor-based GB is their potential to reduce power consumption. As the demand for energy-efficient devices continues to rise, this feature makes 2D semiconductor-based GB an attractive option for future electronic device designs.

As CMOS technology began to reach its physical limitations, the exploration of 2D materials like Graphene and TMDCs emerged as potential alternatives to overcome these constraints. The graphene barristor was developed to address the non-switching issue of graphene-based devices by controlling the Schottky barrier with various semiconductor junctions. This innovation, along with the stable surface states and energy efficiency of 2D semiconductors, has expanded the potential for more adaptable and power-efficient IC integration.

In the late 1960s, there arose a need for new integrated circuit technology, leading to the invention of CMOS (Complementary Metal Oxide Semiconductor). Subsequently, the high integration density and low power consumption of CMOS inverters greatly influenced the advancement of high-density integrated circuit technology. However, with the recent breaking of Moore's Law, scaling down of CMOS-based ICs has encountered limitations. In this scenario, 2D materials such as Graphene and TMDC (Transition Metal Dichalcogenides) began to be considered as new alternatives.

However, the characteristic of having no bandgap in graphene led to the problem of the device not turning off. Due to the absence of a bandgap in the channel, only control of the number of charge carriers accumulated in the channel is possible. Additionally, while graphene theoretically achieves an on/off ratio of around 100, in practice, impurities in the substrate during device fabrication reduce this ratio to around 10, making it insufficient for practical switching applications.

Since the invention of the graphene barristor, subsequent research on switching devices through GB is being conducted by varying the type of semiconductor junction to the graphene, using organic semiconductor, C60 fullerene, CNT, and 2-dimensional (2D) semiconductor (e.g. WS2, MoS2, MoTe2 etc). In case of the 2D semiconductors, recognized for their significantly more stable surface state compared to silicon, they have found a wide range of applications in the fabrication of barristors. They can overcome the dimensional limitations inherent to SiFET CMOS.

Using Organic Semiconductor-Graphene Junction Barristor using C60 fullerene and CNT Two dimensional TMDC van der waals materials (e.g. WS2, MoS2, MoTe2 etc) In case of 2D semiconductors, recognized for their significantly more stable surface state compared to silicon, have found a wide range of applications in the fabrication of barristors. They can overcome the dimensional limitations inherent to SiFET CMOS. This dimensional flexibility not only makes these barristors highly adaptable but also broadens their potential for applications in Integrated Circuit (IC) integration. Moreover, another significant advantage of 2D semiconductor-based GB is their potential to reduce power consumption. As the demand for energy-efficient devices continues to rise, this feature makes 2D semiconductor-based GB an attractive option for future electronic device designs.